Silicon Photonics Chiplet Package - Optical Assembly and Integration Technologies
Explore cutting-edge packaging technologies for silicon photonics chiplets, focusing on optical components, assembly processes, and future high-performance computing applications.
Solving Moore's Law Packaging Challenges Through Next-Generation Materials and 3D Integration
Explore advanced semiconductor packaging solutions addressing Moore's Law limitations through heterogeneous integration, 3D stacking, and innovative copper interconnect materials for enhanced performance and miniaturization.
Getting Ready for the Multi-Architectural Universe - Building Flexible DevOps Pipelines
Discover how to transform DevOps pipelines for multi-architecture deployment, covering parallel builds, cross-compilation, and cost-effective infrastructure optimization for ARM-based processors.
Backdoor in the Core - Altering Intel x86 Instruction Set at Runtime
Dive into groundbreaking research on Intel CPU microcode manipulation, exploring techniques for persistent modifications and potential security implications through microcode backdoors in x86 instruction sets.
Advanced ROP Framework - Pushing Return-Oriented Programming to Its Limits
Discover advanced return-oriented programming techniques with ROP ROCKET framework, featuring syscall bypassing, cross-architecture exploitation, and innovative bad byte handling for enhanced security testing.
Early Microprocessors and the 6502: A Historical and Technical Introduction
Explore the fascinating history of early microprocessors, focusing on the 6502 chip, its programming, and impact on vintage computing systems, with hands-on demonstrations and resources.
AMD Sinkclose - Universal Ring2 Privilege Escalation in System Management Mode
Delve into AMD processor security vulnerabilities, exploring System Management Mode (SMM), CPU design flaws, and the methodology behind ring-2 privilege escalation exploits.
Scaling Xtext - Building Commercial IDEs for Hardware Design Languages
Discover advanced techniques for scaling domain-specific languages with Xtext, focusing on parallel processing, performance optimization, and handling complex hardware designs efficiently.
The World in 2029 - A Future with Human-Level Artificial Intelligence
Explore an optimistic vision of 2029 where AI matches human brain power, potentially solving global challenges like poverty, disease, and environmental issues through technological advancement.
Memory Semantics and Data Movement with CXL and SDXI - Standards and Applications
Explore memory semantics and data movement standards through CXL and SDXI technologies, focusing on accelerator-assisted operations and heterogeneous computing architectures.
Memory Disaggregation and Pooling with CXL - Architecture and Services
Explore memory disaggregation and pooling through CXL technology, covering transparent tiering, fabric management, and advanced data services for modern computing architectures.
Understanding CXL Technology: Memory Expansion and Storage Integration in Modern Data Centers
Explore CXL technology's impact on data center architecture, focusing on memory expansion, storage integration, and Samsung's innovations in memory semantic SSDs and computational storage.
The Path to Autonomous Storage Systems - Challenges and Solutions
Discover breakthrough research in autonomous storage systems, exploring dynamic workload adaptation, efficiency optimization, and performance management for next-generation storage hierarchies.
Envisioning a Computational Storage Architecture with SDXI Data Mover - Early Efforts
Explore the integration of SDXI data mover technology with Computational Storage architectures, focusing on efficient data movement and host offloading strategies for enhanced storage performance.
SSD with CXL Interfaces - Exploring Brilliance and Innovation in Storage Technology
Explore the potential of CXL-based NAND solutions, examining practical applications, technical hurdles, and emerging opportunities in memory expansion and data-centric computing technologies.
CXL Memory Disaggregation and Tiering - Lessons Learned from Storage
Explore memory disaggregation and tiering in CXL technology, comparing it with storage evolution patterns while examining OS support, drivers, and real-time implementation challenges.
Multi-sized THP Performance Benchmarks and Analysis on ARM64
Explore multi-sized THP performance benchmarks and analysis on ARM64 architectures, gaining insights into optimization techniques and system behavior.
TAO: THP Allocator Optimizations
Explore THP Allocator Optimizations with ZHAO Yu, delving into advanced Linux memory management techniques and performance enhancements.
Experiments with Non-Temporal Writes and Application Architectures
Explore non-temporal writes and their impact on application architectures through experimental insights and practical demonstrations.
Data Placement at Scale - Landscape, Trade-Offs, and Direction
Explore data placement strategies for large-scale systems, analyzing trade-offs and future trends in optimizing storage and retrieval efficiency.
The State of Morello and CHERI
Explore the current status and advancements of Morello and CHERI technologies in computer architecture and security.