Disaggregated Memory for High Performance Computing
Explore high-performance computing memory systems, from HPE's memory-driven computing to modern architectures like Frontier and Aurora, examining CXL memories and future computational storage innovations.
Data Redundancy and Scrubbing with RAID Offload Technology
Discover how RAID offload technology optimizes data redundancy solutions, reducing CPU and memory overhead while scaling performance with NVMe SSDs for efficient storage systems.
Accelerating Data Movement with Peer-to-Peer Direct Memory Access (P2PDMA) Technology
Delve into advanced P2PDMA technology for optimizing data transfers between PCIe devices, focusing on AI applications, computational storage, and practical implementation strategies.
Intel IPU and NVMe Initiator with SPDK - Introduction to Hardware Integration and Acceleration Framework
Discover how Intel's IPU hardware and SPDK Acceleration Framework optimize storage workflows, enhance data movement, and improve efficiency through hardware offloading capabilities for cloud service providers.
Emulating CXL Features with QEMU - A Practical Guide
Discover how to emulate CXL features in QEMU, set up a Linux + QEMU CXL environment, and understand the latest developments in CXL technology for open-source ecosystem development.
Memory Optimizations in Machine Learning
Discover essential memory optimization techniques for machine learning, from data quantization to model pruning, and learn efficient strategies for minimizing resource consumption across different hardware setups.
Smart Data Accelerator Interface (SDXI) - Use Cases, Proof Points and Future Development
Explore SNIA's Smart Data Accelerator Interface standard, covering use cases in AI, implementation demos, v1.1 features, and opportunities to contribute to this emerging memory-to-memory data movement technology.
CXL Technology for AI and ML Workloads - Memory Expansion and Performance Optimization
Explore how CXL technology revolutionizes AI/ML workloads through memory expansion, pooling, and sharing. Master performance optimization techniques for large language models and learn practical implementation strategies.
The Future of Green Cloud: Serverless WebAssembly on Arm64 Architecture
Discover how WebAssembly and Arm64 architecture enable sustainable cloud computing through efficient serverless applications, reduced power consumption, and optimized performance per watt.
Building a Mini-ITX PC with Milk-V Jupiter RISC-V - Hardware and Software Guide
Explore the assembly and capabilities of a RISC-V Mini-ITX PC using Milk-V Jupiter, featuring hands-on demonstrations of Bianbu Linux and PCIe card compatibility testing.
FPGA Microservices - Ultra-Low Latency with Off-The-Shelf Hardware
Discover how to achieve ultra-low latency in microservices using FPGA technology with off-the-shelf hardware, exploring practical implementations and performance optimization techniques.
Challenges and Considerations When Designing a Life Cycle Tester
Explore the intricacies of designing Life Cycle Testers for continuous product testing, focusing on 24/7 operations and parallel device testing using LabVIEW's capabilities.
Shesha: Multi-head Microarchitectural Leakage Discovery in New-generation Intel Processors
Discover how Shesha framework automates detection of transient execution attacks in Intel processors, exploring new vulnerabilities in instruction set extensions and cryptographic implementations.
ZenHammer: Rowhammer Attacks on AMD Zen-based Platforms
Discover the first successful Rowhammer attack implementation on AMD Zen processors, exploring reverse engineering techniques, synchronization methods, and exploitation of DDR4/DDR5 memory vulnerabilities.
Peep With A Mirror: Breaking The Integrity of Android App Sandboxing via Unprivileged Cache Side Channel
Discover how cache side-channel attacks can breach Android app sandboxing, revealing private app behaviors through unprivileged memory access and dynamic inter-app component sharing techniques.
SpecLFB: Eliminating Cache Side Channels in Speculative Executions
Discover how SpecLFB leverages Line-Fill-Buffer to eliminate cache side-channel vulnerabilities in speculative executions, offering an efficient defense mechanism with minimal performance impact.
DMAAUTH: A Lightweight Pointer Integrity-based Secure Architecture to Defeat DMA Attacks
Explore a lightweight pointer integrity-based architecture that provides enhanced DMA attack protection while maintaining performance, demonstrated through FPGA implementation and cross-architecture evaluation.