Secure Calling Conventions for CHERI Capability Machines in Practice - Work in Progress
Explore secure calling conventions for CHERI capability machines, focusing on temporal memory safety and stack frame encapsulation. Evaluate performance impact and compatibility.
CHERI and CHERI-RISC-V, by Simon Moore, University of Cambridge
Explore CHERI architecture and its RISC-V implementation, covering hardware principles, software models, and security implications for modern computing systems.
The Morello ISA Semantics, Proof, and Test Generation
Explore Morello ISA semantics, proof techniques, and test generation methods for advanced computer architecture and security applications.
Sealed with a Library Call: Memory Allocators Should Track Capability Seal Operations - POCL'24
Explore the interaction between sealed capabilities and memory allocators in CHERI, examining potential runtime errors and proposing an augmented allocator API for tracking seal operations.
The State of Morello Software and Projects - POCL'24
Explore the current landscape of Morello software and ongoing projects, gaining insights into the latest developments and advancements in this field.
HashTag - Hash-based Integrity Protection for Tagged Architectures
Innovative hash-based error detection and correction technique for DRAM, enabling efficient implementation of tagged memory architectures while maintaining strong data integrity protection.
CHERI Static Analysis - POCL'24
Explore CHERI static analysis techniques for enhanced memory safety and security in software development.
Static Analysis for CHERI - SOAP 2024
Explore custom static analyses supporting C/C++ code transition to CHERI hardware, enhancing memory protection and software compartmentalization for RISC-V and AArch64 architectures.
Sonata: Low-Cost CHERI Hardware for Embedded Systems
Explore low-cost CHERI hardware for embedded systems with Sonata, enhancing security and efficiency in resource-constrained environments.
The State of Morello and CHERI
Explore the current status and advancements of Morello and CHERI technologies in computer architecture and security.