The Reproducible Build Zoo
Explore the Reproducible Builds Project's ARM build farm, its technologies, and challenges in mainline Linux and u-boot support for Debian on ARM boards.
Performance Optimizations in the Wild
Explore RavenDB's recent performance enhancements, covering low-level optimizations, algorithm selection, and strategies for significant speed improvements in database operations.
Self-Aware Applications - Automatic Production Monitoring
Explore techniques for building self-aware Windows applications that can monitor, diagnose, and recover from issues autonomously, using ETW, performance counters, and CLRMD for enhanced reliability.
Practical Ghostbusting - Meltdown, Spectre and You
Learn about Meltdown and Spectre vulnerabilities, their risks, and practical mitigation strategies in this accessible deep dive into modern processor security issues.
Freaking Computers, How Do They Work? - Code Inception
Explore the inner workings of computers, from high-level programming languages to machine code. Dive into x86 architecture and learn how your code is executed at the lowest level.
Megahertz, Gigahertz, Registers and Instructions - How Does a CPU Actually Work?
Explore CPU fundamentals, from basic operations to advanced optimizations. Learn about different processor architectures, internal workings, and future trends, including security challenges like Meltdown and Spectre.
Skewed Gates and Best P/N Ratio - Lecture 6.5
Estimate logical effort and normalized parasitic delay for 2-NOR gate. Apply Elmore delay method to determine optimal P/N ratio for gate designs.
Modeling BUS in Verilog
Learn to model BUS operations, use generate statements, and implement ripple carry adders in Verilog, enhancing your digital design skills and hardware description language proficiency.
Ripple Carry Adder: Design, Delay, and Area Analysis
Learn about ripple carry adders, including their design, delay analysis, and area considerations in digital circuit implementation.
Hardware Implementation of OCaml Using a Synchronous Functional Language
Explore Éclat, a functional language for hardware applications, and its implementation of an OCaml virtual machine on FPGAs, showcasing real-time interaction and customizable runtime.
Hardware Is the New Software - Finding Exploitable Bugs in Hardware Designs
Explore techniques for identifying and exploiting security vulnerabilities in hardware designs, focusing on RISC-V and OR1k CPU architectures using innovative tools and symbolic execution.
Sound Design Techniques - The Killer Chain Part 2: Parallel Processing
Graham Reznick demonstrates advanced parallel processing techniques for horror film sound design, showcasing unique plugin combinations to create immersive and unsettling audio effects.
AEPIC Leak - Architecturally Leaking Uninitialized Data from the Microarchitecture
Systematic analysis of CPU vulnerabilities, exploring root causes and connections between transient-execution attacks and architectural vulnerabilities. Identifies blank spots in CPU security research.
The Beckoning Promise of Personal Fabrication
Explore the potential of personal fabrication with MIT's Fab Lab, empowering individuals to create custom solutions using digital and analog tools, revolutionizing manufacturing and problem-solving.
Fedora RISC-V: History, Current Status, and Future Developments
Explore Fedora's journey with RISC-V architecture, from initial porting to current developments and future plans in virtualization and platform standards.
Accelerating AI Innovation with Arm Total Design - A Chiplet Ecosystem Case Study
Explore how Arm and Samsung leverage chiplet technology and the Total Design ecosystem to accelerate AI innovation through modular silicon design and collaborative development.
AI Technologies Driving Innovation and Transformation in Data Centers
Explore how large-scale AI models transform data center technologies, focusing on Mix of Experts architectures, high-speed interconnects, and multi-GPU optimization for enhanced performance.
Enabling Composable Scalable Memory for AI Inference with CXL Switch
Discover how CXL 2.0 switch technology enables scalable memory systems for AI inference workloads, exploring architecture, configurations, and performance improvements for large language models.
Morello Software and Compilers
Explore Morello software and compilers, focusing on advanced techniques and innovations in programming language implementation for enhanced security and performance.
CHERI Static Analysis - POCL'24
Explore CHERI static analysis techniques for enhanced memory safety and security in software development.
Revisiting Dynamic Dispatch for Modern Architectures
Explore an alternative dispatch mechanism for dynamic languages, addressing modern hardware concerns while maintaining performance comparable to fully typed programs.