RISC-V and RISE Project: Current State and Open Source Initiatives
Explore the current state of RISC-V, an open instruction set revolutionizing hardware design, and learn about the RISE Project supporting its software ecosystem.
Hardware in Space - The Kernel at the Edge of the Universe
Explore the evolution of space-bound hardware, from core memory to ARM SoCs and real-time Linux. Learn about commodity hardware in space exploration and confidential computing's role in securing data beyond Earth.
The Cost of Memory Fragmentation - Performance Implications and Solutions
Explore memory fragmentation's impact on performance, from virtual memory to RAM access patterns. Learn about internal and external fragmentation, page sizes, and real-world examples like MySQL's regression.
Open CPU and SoC Design: From RISC-V to Debian - 37C3 Lecture
Explore RISC-V CPU design, from hardware description to running Debian on FPGA. Covers out-of-order execution, multi-core systems, security, and Linux requirements using the open-source NaxRiscv core.
Addressing Modes in Computer Organization and Architecture
Explore various addressing modes in computer organization, including immediate, direct, register, and indirect addressing, to understand how instructions access memory and operands.
Building a CPU Using GPT for Every Instruction
Explore building a CPU using GPT for every instruction, compiling C code to LLVM-IR. Learn about compilers, virtual machines, and innovative applications of language models in computing.
LLM Efficient Inference in CPUs and Intel GPUs - Intel Neural Speed
Optimize LLM inference on Intel CPUs and GPUs using Neural Speed. Explore efficient techniques for enhanced performance in machine learning and data science applications.
Memento: A Framework for Detectable Recoverability in Persistent Memory
Explore Memento, a high-performance framework for detectable recoverability in persistent memory. Learn about its timestamp-based recovery strategy and implementation in various data structures.
Software and Hardware for Sparse Machine Learning
Explore cutting-edge software and hardware solutions for sparse machine learning, enhancing efficiency and performance in ML applications.
ISVABI: In-Storage Video Analytics Engine with Block Interface
Explore ISVABI, a software/firmware approach for efficient video analytics using SSD block I/O interface. Learn about its implementation, performance improvements, and real-world applications.
Automated Detection of Under-Constrained Circuits in Zero-Knowledge Proofs
Discover a novel technique for detecting vulnerabilities in zero-knowledge proof circuits, combining SMT solving with uniqueness inference to enhance security in blockchain applications.
The Morello ISA Semantics, Proof, and Test Generation
Explore Morello ISA semantics, proof techniques, and test generation methods for advanced computer architecture and security applications.
Sealed with a Library Call: Memory Allocators Should Track Capability Seal Operations - POCL'24
Explore the interaction between sealed capabilities and memory allocators in CHERI, examining potential runtime errors and proposing an augmented allocator API for tracking seal operations.
The State of Morello Software and Projects - POCL'24
Explore the current landscape of Morello software and ongoing projects, gaining insights into the latest developments and advancements in this field.
Morello Cerise - Proving Secure Encapsulation - Work in Progress
Explore Morello Cerise's approach to proving secure encapsulation in this work-in-progress presentation on cutting-edge computer security research.
Heterogeneous Concurrency - A New Frontier for Weak Memory
Explore heterogeneous processors' shared memory interfaces and their impact on weak memory concurrency models in emerging computing domains.
Evolving Weak Memory Models for Evolving Architectures
Explore evolving weak memory models for modern architectures, focusing on advancements and challenges in concurrent programming and hardware design.
System-Level Weak Memory Models: The Need for Formalisation, ISA Semantics Integration and Model Diversity
Explore system-level weak memory models, focusing on formalization, ISA semantics integration, and model diversity in computer architecture.
Programmers Love Mind-Bogglingly Complicated Weak Memory Models
Explore mind-boggling complexities of weak memory models in programming, delving into their intricacies and implications for software development.
Lifting Compiler Security Properties to Stronger Attackers: The Speculation Case
Explore compiler security properties against speculative execution attacks, focusing on lifting guarantees to stronger attacker models and developing a formal framework for well-formedness conditions.
Vectorized Query Execution with SIMD - Lecture 8
Explore advanced vectorized query execution techniques using SIMD for optimized database performance in this comprehensive lecture by Prof. Andy Pavlo.