Lattice-Based Cryptography
Explore lattice-based cryptography, focusing on NewHope algorithm, hardware designs, and optimizations for post-quantum cryptography implementation.
Power Efficient Neural Network Based Hardware Architecture for Biomedical Applications
Power-efficient neural network hardware architecture for biomedical applications, focusing on sleep apnea detection using ECG and SpO2 data. Introduces SABiNN technique for reduced power consumption and compact design while maintaining accuracy.
hls4ml: An Open-Source Co-Design Workflow for Scientific Low-Power Machine Learning Devices
Explore hls4ml, an open-source workflow for implementing machine learning algorithms on FPGAs and ASICs, enabling real-time processing for scientific applications and accelerating discoveries.
Easy Addressable LEDs with Arduino - WS2812B Tutorial
Tutorial on controlling WS2812B addressable LEDs with Arduino, featuring easy-to-use code and practical demonstrations. Learn to create stunning LED displays with simple programming techniques.
Containerizing Hardware Accelerated Applications Using GPUs and FPGAs
Explore containerizing hardware-accelerated applications, focusing on GPU-accelerated media processing. Learn benefits, challenges, and performance implications of this approach.
Design and Implementation of RISC-V Based LoRa Module for IoT Edge Computing
Explore a prototype RISC-V-based LoRaWAN end node PCB design, combining FPGA and RISC-V architecture with LoRa interface for low-power, high-capacity IoT solutions with edge analytics capabilities.
Building Open Hardware with Open Software
Explore FPGA development using open-source tools, focusing on LiteX and RISC-V. Learn to integrate custom hardware with Linux and understand challenges in open hardware design.
Porting an AI-Powered Wearable Health Monitor to Zephyr on Open Hardware
Explore the challenges and solutions in porting a wearable health monitor to Zephyr RTOS, integrating AI on FPGA, and leveraging open hardware for enhanced functionality and performance.
RISC-V and Open Source Hardware - Birds of a Feather Discussion
Explore the RISC-V architecture and open source hardware ecosystem, from CPU cores to FPGA toolchains. Learn about designing fully open-source chips and engage in discussions with experts.
Open Source to the Core: The CORE-V MCU
Explore the groundbreaking CORE-V Microcontroller, an open-source RISC-V-based MCU with rich peripherals and embedded FPGA. Learn about its ecosystem, RTOSes, and integration with Eclipse IoT components.
RISC-V and Open Source Hardware Projects - Birds of a Feather Discussion
Explore RISC-V architecture and open hardware initiatives in this informal discussion. Learn about open source cores, FPGA toolchains, and engage with RISC-V experts to understand the current state of open hardware.
CNCF Research: HPC and HTC End User Landscape - December 2021
Explore HPC/HTC landscape in cloud-native environments, covering solutions, deployments, workload migration, resource management, and tools for high-performance computing.
Linux on Quick Turnaround Projects - Embedded Systems for Phased Array Antennas
Explore embedded Linux in aerospace applications, focusing on phased array antennas and FPGA integration. Learn about hardware decisions, software maintenance, and practical insights from real-world projects.
Implementing a Custom USB Device Controller Driver in Zephyr
Learn to implement a custom USB device controller driver for Zephyr RTOS. Explore integration challenges, workarounds, and lessons learned from a real-world project using an FPGA-based controller.
Hardware and Software Support for Managed Languages in Data Centers
Exploring hardware and software support for managed languages in data centers, focusing on distributed applications, custom hardware, and open-source opportunities for improved performance and efficiency.
RunX: Deploy RTOSes and Baremetal Apps as Containers
Learn to deploy RTOSes and baremetal apps as containers using RunX, exploring implementation choices, runtime steps, and device assignment with practical demos.
The State of Software Development Tools for RISC-V
Explore the current landscape of software development tools for RISC-V, covering emulators, compilers, operating systems, and more. Learn about challenges and opportunities in this emerging architecture.
Scalable MatMul-free Language Modeling - Paper Explained
Explore innovative MatMul-free language modeling techniques using quantization and recurrence, achieving comparable performance to traditional models while significantly reducing computational costs and memory usage.
Empower Programmable Pipeline for Advanced Stateful Packet Processing
Innovative architecture enhancing programmable pipelines for advanced stateful packet processing, enabling flexible dataplane functions through augmented hardware and speculative execution techniques.
Accelerator Chaining for Efficient AI/ML Workloads in Kubernetes
Explore extending Kubernetes to orchestrate and configure accelerator chains for efficient handling of large AI/ML workloads, improving performance and reducing latency in production environments.
Open CPU and SoC Design: From RISC-V to Debian - 37C3 Lecture
Explore RISC-V CPU design, from hardware description to running Debian on FPGA. Covers out-of-order execution, multi-core systems, security, and Linux requirements using the open-source NaxRiscv core.