Top 5 New Single Board Computers for 2024
Discover the most impressive single board computers of 2024, featuring detailed reviews of Radxa X4, Rock 5 ITX, Odroid M1S, and other top contenders for makers and tech enthusiasts.
Adding Test Machines to CI-Tron Instance and Making Use of Them in GitLab
Discover how to seamlessly integrate test machines into CI-Tron systems and leverage them effectively in GitLab projects, with focus on ARM/RISCV64 SBCs and Android devices.
Open-ISA RISC-V CPU 기반 DSA 개요 및 활용 예시 소개
Discover RISC-V CPU의 차별화된 활용 방안과 DSA 구현 전략을 통해 임베디드 시스템 설계의 새로운 가능성과 ARM 대비 장점을 파악하는 전문가의 통찰력 있는 분석.
Static Analysis for CHERI - SOAP 2024
Explore custom static analyses supporting C/C++ code transition to CHERI hardware, enhancing memory protection and software compartmentalization for RISC-V and AArch64 architectures.
What We Learned from C++ Atomics and Memory Model Standardization
Explore insights from C++ atomics and memory model standardization, covering usage patterns, performance implications, implementation challenges, and lessons learned in language design.
Prototyping a Remote-Controlled Telescope with Elixir
Explore the process of designing and building a remote-controlled telescope using Elixir and Rust, from initial research to software prototypes and final physical construction.
Open Hardware, Open Silicon, Open Firmware, and Beyond
Explore open hardware, silicon, firmware, and beyond with Allison Randal. Gain insights into the evolving landscape of open-source technologies in hardware development.
Democratising Chip Design with Open Source
Explore open-source chip design democratization with Rob Taylor, uncovering its potential to revolutionize the semiconductor industry and foster innovation.
Can Open-Source Firmware Finally Succeed?
Explore the potential for open-source firmware to achieve success, examining challenges and opportunities in the evolving landscape of hardware and software integration.
QtRVSim - RISC-V Simulator for Computer Architecture Classes
Explore QtRVSim, an open-source RISC-V simulator for teaching computer architecture. Learn its capabilities, implementation design, and potential educational applications in this insightful presentation.
Road to Testing Applications on RISC-V with QEMU and Fedora
Explore RISC-V application testing using QEMU and Fedora, overcoming challenges in VM and container environments without physical hardware.
Porting and Generalizing Dynamic Privilege in Linux
Explore Dynamic Privilege in Linux: acquire and relinquish hardware privilege on-the-fly. Learn about porting core primitives to ARM64 and implications for system optimization.
LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems
Explore scalable synchronization in manycore systems with LRSCwait. Learn about polling-free and retry-free operations for improved throughput and energy efficiency in shared-memory architectures.
CrossMapping - Harmonizing Memory Consistency in Cross-ISA Binary Translation
Innovative framework for cross-ISA binary translation, enhancing emulation correctness and performance. Introduces specification tables for unified memory model description and efficient primitive mapping.
DC-ROMA RISC-V Laptop II Review and Demo
Comprehensive review of DC-ROMA RISC-V Laptop II, showcasing Ubuntu Linux performance, multimedia capabilities, and future potential of RISC-V architecture in mobile computing.
A Chip on my Shoulder - Open Hardware at SOOCon23
Explore open hardware challenges and innovations with Rob Taylor's insightful presentation on chip development and industry trends.
RISC-V: Reshaping the Future of Compute
Explore RISC-V's impact on computing's future and its inevitable rise in reshaping the industry landscape.
TCG Plugin in Practice: Microarchitecture Research Using QEMU Emulation
Explore TCG emulation's potential in processor design research. Learn to integrate QEMU's TCG with simulators for efficient microarchitecture exploration using RISC-V as an example.
Masking in RISC-V Architecture - CHES 2024
Explore cutting-edge masking techniques for RISC-V architecture in this CHES 2024 session, focusing on enhancing cryptographic security and side-channel attack resistance.
Uniting Sustainability and Edge Computing: Kepler and Open Horizon on RISC-V and Heterogeneous Systems
Explore integrating Kepler and Open Horizon for energy-efficient cloud-edge computing across diverse hardware, including RISC-V. Demonstration of use case optimizing distributed systems for sustainability.
Raspberry Pi Pico 2 and New Pimoroni Products - Overview and Features
Explore the new Raspberry Pi Pico 2 with RP2350 dual Arm & Risc V architecture. Learn about its features, comparisons, and exciting new Pimoroni products in this comprehensive overview.