RISC-V CoVE-IO: An Introduction to Confidential Virtual Environments for I/O
Explore RISC-V CoVE-IO architecture and its implications for system design with experts Jiewen Yao and Samuel Ortiz.
Linux on Open Source Hardware with Open Source Chip Design
Explore open hardware projects for Linux, including BeagleBone and OLinuXino. Learn about RISC-V and free FPGA toolchains for creating libre systems and running Linux on open source chip designs.
Mentorship Session - It's Not Just About Embedded! The Yocto Project
Explore custom Linux system creation with Yocto Project. Learn to build and boot for RISC-V, understand underlying technology, and discover why you might need a tailored Linux distribution.
The Future of Security is in Open Silicon
Explore open silicon's role in future security, focusing on RISC-V processors and Zephyr OS to create a secure root of trust for Linux systems. Learn about hardware security cores and privilege levels.
Linux on RISC-V and the New OS-A Platform
Explore Linux on RISC-V, covering architecture, boot process, hardware support, and ongoing developments. Learn about RISC-V extensions, platform specifications, and Linux kernel integration.
Scalable Memory Protection in the PENGLAI Enclave
Innovative hardware-software design for scalable, dynamic secure memory in enclaves, featuring Guarded Page Tables and Mountable Merkle Trees to enhance protection, performance, and resource utilization.
A Security RISC? The State of Microarchitectural Attacks on RISC-V
Systematic investigation of microarchitectural attack surface on 64-bit RISC-V CPUs, exploring vulnerabilities and security implications as RISC-V architecture gains popularity in commercial processors.
RISC-V Software Ecosystem in 2020
Explore RISC-V software ecosystem's evolution, current status, and future goals. Gain insights into key projects and opportunities for developers to contribute to this growing open-source platform.
RISC-V FDPIC - NOMMU Toolchain - Runtime Support
Explores RISC-V FDPIC/NOMMU support, detailing design for FDPIC psABI, toolchain and runtime changes for Linux/GNU systems, and addressing challenges in NOMMU systems with shared read-only segments.
Universal Tools for Acceleration, Timing, Integration & Machine Enhancement
Explore open-source tools and methods for accelerating Open ISA processors, including implementation of specialized compute functions and RISC-V extensions.
HiFive Unmatched Software and Hardware
Explore RISC-V computing with SiFive's new Linux desktop: hardware specs, software stack, and live demos showcasing free software running on this innovative platform.
Open ISAs - RISC-V, OpenPOWER, etc
Explore the growth and potential of open CPU architectures like RISC-V and OpenPOWER, discussing recent developments, available hardware, and their importance for the future of open source computing.
RISC-V MC
Explore RISC-V ecosystem growth, hardware designs, and Linux kernel support. Discuss design challenges and ideas for implementing kernel features, aiming to increase developer participation and improve RISC-V Linux stability.
RISC-V MC
Explore RISC-V architecture and its implementation in Linux systems at the Linux Plumbers Conference, focusing on microcontroller applications and developments.
RISC-V MC
Explore RISC-V architecture and its implementation in Linux systems through expert discussions and technical presentations at the Linux Plumbers Conference.
The Odyssey of HWCAP on RISC-V Platforms - Ruinland
Explore the journey of HWCAP implementation on RISC-V platforms, delving into challenges, solutions, and future developments in Linux kernel architecture.
Tuning in-kernel Routines on RISC-V
Explore optimization techniques for RISC-V architecture, focusing on in-kernel routines to enhance Linux performance and efficiency on this emerging platform.
RISC-V Ftrace - Working with Preemption
Explore RISC-V ftrace implementation challenges and solutions for handling preemption in Linux kernel tracing, enhancing debugging capabilities for RISC-V architecture.
Confidential Computing for RISC-V-based Platforms
Explore confidential computing implementation on RISC-V platforms, focusing on security enhancements, architectural considerations, and potential applications in secure data processing.
Hardware Is the New Software - Finding Exploitable Bugs in Hardware Designs
Explore techniques for identifying and exploiting security vulnerabilities in hardware designs, focusing on RISC-V and OR1k CPU architectures using innovative tools and symbolic execution.
Fedora RISC-V: History, Current Status, and Future Developments
Explore Fedora's journey with RISC-V architecture, from initial porting to current developments and future plans in virtualization and platform standards.