
Explore RISC-V architecture and open hardware initiatives in this informal discussion. Learn about open source cores, FPGA toolchains, and engage with RISC-V experts to understand the current state of open hardware.

Explore RISC-V's future, open-source development, and community-driven initiatives with Stephano Cetola from RISC-V International in this informative session.

Explore edge computing using RISC-V platforms and XIP Linux, focusing on implementation strategies, performance optimization, and real-world applications in resource-constrained environments.

Explore virtualization-aware interrupt handling in RISC-V, focusing on trap-less virtual interrupts for KVM. Learn about implementation, benchmarks, and future developments.

Explore Ubuntu's progress on RISC-V architecture, including supported devices, ecosystem maturity, and future plans. Gain insights into this emerging technology's current state and potential.

Explore RISC-V cryptography extensions, their current status, and future developments with insights from Ben Marshall of University of Bristol and PQShield.

Explore RISC-V architecture: supported hardware, virtual machines, boot flow, package building, and software availability. Learn about the evolving ISA and its implications for Ubuntu.

Explore hardware-assisted control flow integrity mechanisms for RISC-V, focusing on shadow stacks and landing pad instructions to enhance program safety and prevent memory-based attacks.

Exploring RISC-V kernel's patchwork CI: setup, builds, tests, limitations, and future plans. Seeking input on improving developer experience and submission quality.

Exploring RISC-V Linux kernel's perf support challenges and upcoming ISA extensions. Discusses implementation issues, event mapping, and user space access to improve performance monitoring capabilities.

Exploring RV64ILP32: advantages, performance comparisons, and implementation across platforms. Demonstrates potential for improved RISC-V hardware performance and cost-effectiveness.

Explore RISC-V KVM's irqbypass implementation, focusing on AIA and IOMMU specifications, MRIF support, and uAPI proposals for notice MSI delivery. Discuss performance implications and accounting improvements.

Explore Android's RISC-V integration, covering kernel progress, GKI, extensions, optimizations, and emerging challenges in this processor architecture shift.

Explore an efficient RISC-V virtual machine for sandboxed environments, featuring reduced memory usage and JIT compilation for secure software execution.

Explore Zephyr's support for hobbyist-friendly open-source hardware, focusing on Arduino UNO R4, Raspberry Pi Pico, and RISC-V boards. Learn about PIO features, shield compatibility, and ArduinoCore integration.

Explore how RISC-V and open-source hardware are transforming chip design economics for IoT, edge computing, and AI applications, revolutionizing the semiconductor industry.

Explore OpenEmbedded/Yocto support for RISC-V architecture, covering current status, challenges, and essential package ports. Learn about infrastructure, SOC layers, and future developments in embedded Linux for RISC-V.

Explore KVM's growth, challenges, and future prospects in cloud computing, including new ports, increased complexity, and strategies for scaling contributors and use cases.

Explore RISC-V's rapid growth as an open standard architecture, driving innovation in processors across industries. Discover its momentum and opportunities for software from embedded to enterprise applications.

Explore RISC-V's Advanced Interrupt Architecture (AIA) and its virtualization features in KVM, covering MSIs, IPIs, and wired interrupts for scalable CPU support.

Explore RISC-V software ecosystem and OP-TEE port, enhancing device security through open-source solutions. Learn about Trusted Execution Environments and their applications in various industries.