RAM and Bus Timing for 6502 Microprocessor - Part 6
Explore RAM and bus timing in 6502 microprocessors. Learn about schematics, datasheets, and hardware implementation for a deeper understanding of computer architecture.
How CPUs Read Machine Code - 6502 Part 2
Explore the inner workings of CPUs and machine code interpretation, focusing on the 6502 processor. Gain insights into low-level computer architecture and assembly language programming.
8-Bit CPU Control Logic - Part 1
Explore the creation of a custom machine language and learn how control logic executes programs in an 8-bit CPU, providing insights into low-level computer architecture.
Adding Machine Language Instructions to the CPU
Explore CPU enhancements with new instructions: STA, LDI, and JMP. Learn to write and execute programs using these additions, expanding your understanding of machine language.
Journey to the Centre of the JVM - Exploring CPU Architecture and Memory Models
Explore CPU architecture, memory models, and JVM intrinsics through functional abstractions, unraveling a complex bug in Scala implementation across different hardware.
RISC-V and Open Source Hardware - Birds of a Feather Discussion
Explore the RISC-V architecture and open source hardware ecosystem, from CPU cores to FPGA toolchains. Learn about designing fully open-source chips and engage in discussions with experts.
KVM-based Virtualization Contributor Q&A Panel Discussion
Experts discuss KVM virtualization, covering topics like isolation, cloud hardware, innovation, CPU architectures, and the future of virtualization technology.
Co-Design and Co-Verification of Masked Software Implementations on CPUs
Explore co-design and co-verification of masked software implementations on CPUs, focusing on physical side-channel attacks, hardware/software gaps, and innovative solutions.
CPU Feature Management: Lessons from Trenches
Explore CPU feature management challenges in heterogeneous hardware clustering, including migration issues, feature deprecations, and contrasting interpretations between Intel and AMD.
Cutting Edge Toolchain - Latest Features in GCC and GLIBC
Explore latest features in GCC 8/9 and Glibc 2.29, including performance optimizations, security enhancements, and CPU architecture advancements for Linux developers.
The Cost of Memory Fragmentation - Performance Implications and Solutions
Explore memory fragmentation's impact on performance, from virtual memory to RAM access patterns. Learn about internal and external fragmentation, page sizes, and real-world examples like MySQL's regression.
Open CPU and SoC Design: From RISC-V to Debian - 37C3 Lecture
Explore RISC-V CPU design, from hardware description to running Debian on FPGA. Covers out-of-order execution, multi-core systems, security, and Linux requirements using the open-source NaxRiscv core.
Building a CPU Using GPT for Every Instruction
Explore building a CPU using GPT for every instruction, compiling C code to LLVM-IR. Learn about compilers, virtual machines, and innovative applications of language models in computing.
Vectorized Query Execution with SIMD - Lecture 8
Explore advanced vectorized query execution techniques using SIMD for optimized database performance in this comprehensive lecture by Prof. Andy Pavlo.
When Qiling Framework Meets Symbolic Execution
Exploring Qiling Framework's new symbolic execution capabilities for advanced binary analysis across architectures, with demonstrations and insights into its development and applications.
MIPS-X - The Next IoT Frontier
Explore MIPS-based IoT device research with a framework for efficient emulation, vulnerability analysis, and exploit development. Gain insights into CPU architectures, virtualization, and cross-compilation techniques.
Recon 2017 Brussels - r2m2 by Guillaume "guedou" Valadon
Presentation on r2m2, a radare2 plugin leveraging miasm2 for reversing rare CPU architectures. Demonstrates integration of powerful reverse engineering tools and simplifies implementation of new architectures.
ZombieLoad Attack
ZombieLoad: Powerful Intel CPU vulnerability allowing data leaks across processes, kernels, and VMs. Explores attack methods, demonstrates real-world impacts, and discusses implications for hardware/software security.
Inside the AMD Microcode ROM
Reverse engineering AMD CPU microcode: mapping physical to virtual addresses, developing custom microcode programs, and implementing defensive measures. Includes open-source framework and hardware setup details.
Meltdown and Spectre for Normal People
Understand Meltdown and Spectre security flaws: their hardware basis, widespread impact, and patching challenges. Includes insights on CPU architecture and security vulnerability management.
Uncover, Understand, Own - Regaining Control Over Your AMD CPU
Explore AMD's Platform Security Processor: firmware analysis, functionality insights, and security implications. Learn to extract, replace, and observe PSP components, gaining control over your AMD CPU.