P4OVN - Offloading OVN Pipeline to Intel IPU
Explore advanced network virtualization techniques and pipeline offloading strategies using Intel IPU technology for optimized OVN performance and efficiency.
Empowering the User Journey with Samsung CXL in the AI Era
Discover how Samsung's CXL memory solutions revolutionize data centers for AI workloads, featuring advanced memory lineups and ecosystem partnerships for enhanced computing performance.
Memory Expansion Requirements for AI Systems in Hyperscale Data Centers
Explore evolving memory architecture requirements for AI systems in hyperscale data centers, focusing on GPU acceleration and infrastructure optimization for next-generation applications.
MCTP and PLDM Enhancements for Advanced OCP Use Cases
Explore the latest updates to MCTP and PLDM specifications, focusing on new physical media bindings, file transfers, and advanced management capabilities for accelerators and NICs.
Accelerator Clusters: The New Supercomputer
Discover how accelerator clusters are revolutionizing supercomputing through NVIDIA's innovative approach to high-performance computing architecture and interconnect technologies.
Open Fabrics Interfaces Libfabric Tutorial
Discover the fundamentals of Open Fabrics Interfaces Libfabric, exploring its architecture, implementation, and practical applications in high-performance networking environments.
Understanding How Microarchitecture Impacts Microservices
Discover how microarchitecture design choices affect microservices performance, scalability, and efficiency in modern distributed systems through practical insights and architectural analysis.
High Performing and Predictable Java Network Programming
Master network programming techniques in Java with focus on high performance and predictability, covering advanced concepts for building efficient and reliable networked applications.
Leveraging SmartNICs for HPC and Data Center Applications - Part 1
Discover how SmartNICs revolutionize high-performance computing and data center operations, exploring key implementation strategies and performance optimization techniques for modern infrastructure.
Unified Collective Communication - A Library for CPU, GPU, and DPU Integration
Explore the innovative Unified Collective Communication library that seamlessly integrates CPU, GPU, and DPU communication, enhancing performance across diverse computing architectures.
Demystifying the Communication Characteristics for Distributed Transformer Models
Explore communication patterns and optimization strategies for distributed transformer models, focusing on collective operations and performance characteristics in large-scale deployments.
Rail-only: A Low-Cost High-Performance Network for Training LLMs with Trillion Parameters
Discover a groundbreaking network architecture designed for efficient training of large language models, optimizing performance while reducing infrastructure costs.
Chip-let Interconnect Test and Repair
Explore advanced techniques for testing and repairing chip-let interconnects, focusing on practical solutions and emerging methodologies in semiconductor manufacturing.
A New Mechanism to Identify Congesting Packets in High-Performance Interconnection Networks
Discover innovative techniques for identifying network congestion through advanced packet tracking mechanisms in high-performance interconnection systems.
The Challenges of Scaling Beyond Moore's Law - From Monolithic Dies to 3D Heterogeneous Integration
Explore the shift beyond Moore's Law into 3D heterogeneous integration, examining technical challenges, economic factors, and emerging solutions in semiconductor design and packaging.
Signal Integrity Analysis for 2.5D/3D IC Technology in the Interposer Era
Delve into signal integrity analysis challenges and solutions for 2.5D/3D IC technology, focusing on silicon interposers, electromagnetic simulation, and advanced packaging architectures.
3D IC Test Strategy and DFT Methodologies for Advanced Packaging Technologies
Explore comprehensive testing strategies for 3D integrated circuits, covering DFT methodologies, BSDL implementation, and IJTAG integration for advanced semiconductor packaging technologies.
Silicon Photonics Chiplet Package - Optical Assembly and Integration Technologies
Explore cutting-edge packaging technologies for silicon photonics chiplets, focusing on optical components, assembly processes, and future high-performance computing applications.
Solving Moore's Law Packaging Challenges Through Next-Generation Materials and 3D Integration
Explore advanced semiconductor packaging solutions addressing Moore's Law limitations through heterogeneous integration, 3D stacking, and innovative copper interconnect materials for enhanced performance and miniaturization.
Infrastructure and Applications for AI in Semiconductor Test
Explore cutting-edge AI applications and infrastructure developments in semiconductor testing, focusing on optimization and efficiency improvements in manufacturing processes.
Implementing Real-time AI in High Volume Test
Discover practical strategies for implementing AI solutions in high-volume semiconductor testing environments, focusing on real-time applications and efficiency optimization.