
Discover how Llumnix optimizes large language model serving through dynamic request scheduling, cross-instance defragmentation, and innovative KV cache migration techniques for improved performance.

Explore a novel programming model for intermittent computing on ultra-low-power microcontrollers, enabling efficient multithreaded processing and event handling with minimal progress loss during power failures.

Explores deep learning model sparsity via Tensor-with-Sparsity-Attribute, enabling efficient sparse models across various patterns and optimization techniques, delivering significant speedups compared to state-of-the-art solutions.

Fault-tolerant far memory system using erasure-coding and remote memory compaction for efficient datacenter applications, offering improved latency and performance over existing solutions.

Explore capability-based isolation and efficient data sharing in cloud environments using cVMs, a novel VM-like abstraction leveraging memory capabilities for enhanced security and performance.

Explore Orca, a distributed serving system for transformer-based generative models, featuring iteration-level scheduling and selective batching to enhance performance and efficiency in large-scale language model inference.

MemLiner: Runtime technique improving far-memory systems by aligning application and garbage collection memory accesses, reducing local-memory working set and enhancing remote-memory prefetching for better performance.

Explore Owl, Meta's high-scale content distribution system combining centralized control with peer-to-peer data transfer, offering improved speed and flexibility over traditional methods.

Explore Unity, a system optimizing distributed DNN training through joint algebraic transformations and parallelization. Learn about its unified parallel computation graph and hierarchical search algorithm for improved performance.

Explores metastable failures in distributed systems, analyzing real-world incidents to categorize triggers and amplification mechanisms, aiding understanding and potential solutions for this prevalent issue.

Automating device driver isolation to protect kernels from vulnerabilities, using CPU extensions for low-overhead implementation and advanced analyses to identify shared state and synchronization requirements.

Introduces ROLLER, a fast tensor compilation approach for deep learning using rTile abstraction and recursive construction, generating efficient kernels in seconds for various accelerators.

Explore Knox, a framework for building verified hardware security modules (HSMs) that eliminates bugs and side channels through formal verification and information-preserving refinement.

Innovative system for metadata-private voice communication, scaling to 32K users with low latency. Utilizes untrusted infrastructure and novel mailbox assignment, improving on existing solutions for secure communication.

Explore TEMERAIRE, a hugepage-aware memory allocator enhancing TCMALLOC to reduce CPU overheads, improve application performance, and optimize fleet efficiency in warehouse-scale computing.

Efficient federated learning system that improves model training and testing by intelligently selecting participants based on data utility and device capabilities, enhancing accuracy and performance.

Optimizing tensor programs with partially equivalent transformations, improving DNN efficiency by up to 2.5×. Introduces PET framework for automated corrections and theoretical foundations for equivalence examination.

Explore a novel Linux kernel storage stack architecture achieving microsecond-scale latency and high throughput, adapting network switch techniques for improved performance without application modifications.

Innovative hardware-software design for scalable, dynamic secure memory in enclaves, featuring Guarded Page Tables and Mountable Merkle Trees to enhance protection, performance, and resource utilization.

MAGE: An execution engine for secure computation, enabling efficient processing of large-scale encrypted data by leveraging oblivious memory access patterns to optimize virtual memory management.

Innovative NIC-CPU co-design accelerating datacenter applications with μs-scale RPCs. Features fast network-to-CPU path, hardware-supported transport and load balancing, achieving 69ns wire-to-wire response time and improved performance.