Introduction to Delay in CMOS - Lecture 3.5
Explore propagation and contamination delays in digital circuits, parasitic capacitances, and input capacitances for estimating CMOS delay.
Characterizing Delay of NOR Gate - Lecture 4.5
Estimate propagation and contamination delays of 3-Nand gate, exploring effort delay and parasitic delay concepts for different sizes.
Extracting Capacitances of 3-NAND Gate for Delay Estimation - Lecture 4.4
Learn to extract capacitances for 3-Nand gate delay estimation and size transistors to match inverter resistances.
RC Approximated Delay for CMOS Inverter Circuits - Lecture 3.7
Explore CMOS inverter circuit approximation to RC equivalent for estimating propagation delay.
Delay of Fanout-4 Inverter in Digital Circuit Design - Lecture 4.3
Deduce the expression for fanout-4 inverter delay, exploring its impact on circuit performance and design considerations.
Ring Oscillator Design for Clock Signal Generation
Design and analyze ring oscillators to generate clock signals using inverter chains, exploring frequency control and performance optimization techniques.
Optimizing Gate Size for Single-Path Digital Design - Lecture 5.4
Optimize gate sizes and transistor widths to minimize delay in single-path digital designs through practical examples and techniques.
Fast Adder: Carry Select Adder
Explore the carry select adder, a fast addition technique, and understand its principles and implementation in digital circuit design.