Live Migration Implementation for PCIe SSDs - Understanding NVMe Features
Dive into PCIe SSD Live Migration implementation, covering state machine transitions, VM addressing, and NVMe specifications for both Source and Target SSD behaviors in this technical deep-dive.
Demystifying PCIe Performance and Tuning Parameters
Explore PCIe performance optimization techniques and tuning parameters to enhance system efficiency and throughput in Linux environments.
Debugpci - Making PCIe Common Error Debugging Easier
Learn to streamline PCIe error debugging with debugpci tool, covering architecture, implementation, and real-world use cases for efficient diagnosis and resolution.
Adding RAS Support for CXL Port Devices
Explore CXL RAS error handling for port devices, discussing challenges and potential solutions for implementing common support across various CXL hardware entities.
Understanding Routable PCIe Performance for Composable Infrastructures
Exploring routable PCIe fabric performance in composable infrastructures using rPCIeBench. Analyzes communication characteristics, traffic orchestration, and develops insights for optimizing flow scheduling in shared fabrics.
VirtIo-Net PCIe Function Using Linux PCI Endpoint Framework - Lecture
Explore VirtIo-Net PCIe function implementation using Linux PCI Endpoint Framework. Learn about architecture, virtio-net driver, and API for controlling virtio virtqueues in PCIe devices.
PCIe Portdrv - Finding a Path Forwards
Explore the future direction of PCIe Portdrv and its potential developments in Linux systems. Gain insights into challenges and proposed solutions.
Gen-Z on Linux - Supporting a New System Interconnect in Free Software
Explore Gen-Z, a versatile system interconnect, and its integration into Linux. Learn about its capabilities, implementation challenges, and current development status using a freely available emulator.
Introduction to the Dual Small Form Factor (DSFF) for OCP NIC 3.0
Explore the enhanced capabilities of Dual Small Form-Factor in OCP NIC specification, featuring doubled board area, PCIe Gen6 support, and 160W power delivery for advanced networking deployments.
NVMe Host Managed Live Migration - Overview and Implementation
Discover the technical aspects of NVMe protocol's Live Migration feature, including controller migration, namespace management, and host memory modification tracking.
NVMe Technology Overview - Latest Features and Standards Roadmap
Discover the latest NVMe features, standards roadmap, and new initiatives in storage technology, focusing on high-performance applications across client, cloud, and enterprise environments.
PCIe Extended Connectivity Requirements for Rack-Level Disaggregation
Explore PCIe Extended Connectivity requirements for rack-level disaggregation, covering NVMe and CXL interconnects for compute, acceleration, memory, and storage modules using Gen5 & Gen6 technologies.
Compute Express Link (CXL): Advancing Coherent Connectivity
Discover how CXL 3.0 enhances system architecture through advanced switching, memory pooling, and fabric capabilities for optimized computational infrastructure performance.
Memory Scalability in AI Co-Design Using CXL Technology
Explore memory and storage architecture innovations for AI systems, focusing on CXL technology's role in enabling efficient data sharing and scalable memory solutions for large-scale AI workloads.
The Future of AI/ML Innovation Through Row-Scale Disaggregation
Explore how Composable Disaggregated Infrastructure revolutionizes system architecture for AI/ML applications through innovative network fabric design and extended PCIe capabilities.
Secure System Boot Architecture and Protocols for OCP Flashless Boot
Explore the architecture and protocols of OCP Flashless Boot, including system boot processes, PCIe device booting, and future adoption roadmap for secure computing infrastructure.
Future-Ready Green O-RAN: Leveraging FPGAs for Enhanced Security, Performance and Low Power
Discover how FPGAs enhance ORAN networks through robust security, precise synchronization, and power-efficient acceleration for optimal network performance and interoperability.
Implementing PCIe Connectivity with Optics - Optical Solutions for High-Speed Computing
Explore the latest developments in optical PCIe connectivity, focusing on protocol adaptations, new form factors, and enhanced link management for AI and high-performance computing applications.
CXL 2.0 Use Case - Using Both DDR4 and DDR5 on the Same Server for Memory and Bandwidth Scaling
Explore CXL 2.0 technology's capabilities for integrating DDR4 and DDR5 memory in data centers, focusing on scalable memory expansion and enhanced bandwidth performance for modern computing needs.
Supporting Meta ML Accelerators on the Grand Teton Platform
Discover how Meta modifies the Grand Teton platform to integrate ML accelerators, exploring hardware design changes, carrier card implementation, and rack configuration for enhanced performance.
Debugging Capabilities and Best Practices for AI GPU Systems
Explore debugging challenges and best practices for AI GPU systems, focusing on PCIe subsystems, system crashes, and management controllers while learning essential troubleshooting tools and techniques.