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1
Intro
2
Hasjim Williams
3
Floods - let's be prepared Kayak
4
Evolution of Processor Industry - 1990s
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Evolution of Processor Industry - Today
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Why Instruction Set Matters
7
Open Software/Standards Work! Standard
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RISC-V Base Instructions
9
RISC-V Extensions
10
RISC-V Custom Instructions
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Compiler Support - New Instructions / Co-processor
12
Why Open-Source the Freedom Platform? SiFive FOSDEM 2018
13
RISC-V Community Member - Benefits
14
Simulation using Verilator
15
LiteX Provide the infrastructure to create complex SoCs with Python/Migen
16
Combinational
17
Finite State Machines
18
Remote control and debugging in LiteX
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Bridge Advantage
20
LiteX sim & Verilator
21
Arty Devboard
22
Glasgow Interface Explorer / Scotts Army Knife
23
MicroPython and CircuitPython
24
Bare-Metal C
25
Zephyr
26
Linux on LiteX
27
QEMU
28
SymbiFlow - Reverse Engineered FPGA Bitstreams
29
Accelerate your design
30
x86-64 Surfboard
31
Dual ARM powered
32
RISC-V powered Jet Ski?
33
HAL 9000
34
Terminator
35
Carl's Draperies
36
Back to the Topic
37
Holoverse - Dinosaurs
38
Hewlogram
Description:
Explore a conference talk on accelerating Open ISA processors and implementing specialized compute functions. Learn about the reasons, open source tools, and methods for enhancing processor performance. Discover the evolution of the processor industry, the importance of instruction sets, and the benefits of RISC-V architecture. Dive into topics such as compiler support, simulation techniques, and development boards. Gain insights into LiteX infrastructure, remote debugging, and various software platforms including MicroPython, Zephyr, and Linux. Understand the potential of FPGA bitstreams and accelerated designs across different processor architectures.

Universal Tools for Acceleration, Timing, Integration & Machine Enhancement

linux.conf.au
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