Useful libraries to implement network applications
14
Routing Network Connections
15
Gigabit Ethernet MAC
16
Towards a fully hardware implementation
17
Timing Constraints - Dependencies
18
Primary goal: the Ethernet extension cord
19
FPGA expansion modules
20
Ethernet at "ground" level
21
Conveyor belt model
22
Network Packets
23
Assembly chain model
24
Ethernet Frame structure
25
Preamble detector
26
MAC and EtherType filters - Preparation
27
MAC address
28
Search Algorithm version 1-tricotomic
29
MAC filter state machine
30
MAC and EtherType filters configuration
31
Demo: MAC filtering
32
MAC filter conclusions
33
EtherType filter configuration
34
Search Algorithm version 2
35
Encryption Environment
36
Encryption configuration
37
Encryption schema
38
Encryption architecture - "Signature"
39
Demo: Encryption
40
Demo: Decryption
41
Moving towards a higher level...
42
Achievements
43
Future Upgrades
44
Questions?
45
Checksum generation
Description:
Explore real-time packet processing using FPGAs in this comprehensive conference talk from the Hack In The Box Security Conference. Dive into the limitations of Von Neumann architecture and discover how FPGAs offer a non-Von Neumann approach to overcome bottlenecks. Learn about FPGA internals, Xilinx fabric families, and the ZYNQ architecture. Examine useful libraries for implementing network applications and understand routing network connections. Delve into Gigabit Ethernet MAC and timing constraints as you work towards a fully hardware implementation. Investigate Ethernet at the ground level using conveyor belt and assembly chain models. Analyze Ethernet frame structure, preamble detection, and MAC and EtherType filters. Explore search algorithms, encryption environments, and witness demonstrations of MAC filtering, encryption, and decryption. Gain insights into achievements and future upgrades in FPGA-based packet processing.
Capture This - Real Time Packet Processing With FPGAs