Главная
Study mode:
on
1
Introduction
2
Goals
3
Inspiration
4
Identifying Interfaces: External
5
Manually Determining Pin Function
6
On-Chip Debug Interfaces
7
JTAG:Architecture
8
JTAG:TAP Controller
9
JTAG: Protection
10
JTAG: HW Tools
11
UART 3
12
Hardware
13
Design Requirements
14
Block Diagram
15
PCB
16
Propeller/Core 2
17
USB Interface
18
Adjustable Target Voltage
19
Level Translation
20
Input Protection
21
Bill-of-Materials
22
Source Tree
23
Propeller Resources
24
IDCODE Scan
25
BYPASS Scan
26
UART Scan
27
Scan Timing
28
Demonstration
29
Possible Limitations
30
A Poem
Description:
Explore on-chip debug interfaces and hardware hacking techniques in this DerbyCon 3.0 conference talk. Delve into the world of JTAG architecture, TAP controllers, and UART protocols as Joe Grand presents the JTAGulator, a tool for assisted discovery of debug interfaces. Learn about hardware design requirements, PCB layouts, and component selection for building such devices. Witness demonstrations of IDCODE scans, BYPASS scans, and UART scans, while understanding potential limitations. Gain insights into manually determining pin functions and identifying external interfaces, all essential skills for hardware security professionals and enthusiasts.

Jtagulator - Assisted Discovery of On-Chip Debug Interfaces

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