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on
1
Intro
2
Physical Side-Channel Attacks
3
The HW/SW Gap
4
Example: Register file
5
Co-Verification Flow of Coco
6
Co-Verification with Coco
7
Co-Design with Coco
8
Example: SW Constraints for Register File
9
Further Problems and Solutions
10
Evaluation
11
Outlook
12
Summary
Description:
Explore a comprehensive talk on co-design and co-verification of masked software implementations on CPUs. Delve into physical side-channel attacks, the hardware/software gap, and the co-verification flow of Coco. Examine software constraints for register files, evaluate solutions to various problems, and gain insights into future developments in this field. Learn from Barbara Gigerl's expertise as she presents at TASER 2021, offering valuable knowledge for those interested in secure software implementation and CPU architecture.

Co-Design and Co-Verification of Masked Software Implementations on CPUs

TheIACR
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