Verified seL4 on Secure RISC-V Processors

Verified seL4 on Secure RISC-V Processors

Explore the implementation and verification of seL4 microkernel on RISC-V architecture in this 45-minute conference talk from linux.conf.au 2020. Delve into the attractions of RISC-V, including its open architecture and commitment to security. Learn about industry investments in combining RISC-V and seL4, focusing on formal verification and implementation correctness proof. Discover related open-source technologies like the CAmkES component framework and Cogent systems language. Examine the challenges of timing channels and the development of time protection mechanisms. Gain insights into collaborations with the RISC-V Foundation's Security Standing Committee to enhance processor specifications for improved security.