SRNIC - A Scalable Architecture for RDMA NICs
Explore a 17-minute conference talk from USENIX NSDI '23 that introduces SRNIC, a novel Scalable RDMA NIC architecture designed to address connection scalability challenges in large-scale data center networks. Learn how the researchers from Hong Kong University of Science and Technology and ByteDance tackle the limitations of commercial RoCEv2 NICs by minimizing on-chip data structures and memory requirements through careful protocol and architecture co-designs. Discover the key innovations, including cache-free QP scheduler and memory-free selective repeat, that enable SRNIC to achieve 10K performant connections on chip while maintaining high performance, low CPU overhead, and high network scalability. Gain insights into the experimental results that demonstrate SRNIC's superior connection scalability compared to commercial RNICs, along with its impressive throughput and latency performance.