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#Instruction Set Architecture

Showing: 37 courses
Robert Feranec

How Does a CPU Work and How to Create Your Own Processor

1 rewiews
Explore CPU functionality and design your own processor in this comprehensive tutorial. Learn about registers, program counters, instruction execution, logic gates, and FPGA implementation.
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12 Lesons
1 hour 26 minutes
On-Demand
Free-Video
Stanford University

Stanford Seminar - Accelerating ML Recommendation with Over a Thousand RISC-V-Tensor Processors

0 rewiews
Explore Esperanto's innovative 7nm chip with 1000+ RISC-V processors, designed for efficient ML recommendation. Learn about its architecture, performance, and energy-saving features.
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23 Lesons
1 hour 10 minutes
On-Demand
Free-Video
IEEE

Formal Modelling and Proof in the CHERI Design and Implementation Process

0 rewiews
Explore rigorous engineering methods for developing secure processor architecture, focusing on CHERI's hardware capabilities for fine-grained memory protection and secure compartmentalization.
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19 Lesons
15 minutes
On-Demand
Free-Video
ChibiAkumas

Even More Assembler Terminology - Lesson 7

0 rewiews
Explore assembler terminology, including direction pointers, indirection, jumps, subroutines, and logical operations, to enhance your understanding of low-level programming concepts.
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8 Lesons
29 minutes
On-Demand
Free-Video
cpponsea

Being Friendly to Your Computer Hardware in Software Development

0 rewiews
Discover how software engineering practices can better align with modern hardware architectures, optimizing performance through hardware-aware development approaches and practical implementation strategies.
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1 Lesons
1 hour 6 minutes
On-Demand
Free-Video
Linux Foundation

The CFU: Custom Hardware with RISC-V and Zephyr

0 rewiews
Explore custom hardware integration using RISC-V's Custom Function Unit and Zephyr RTOS on FPGAs, enhancing embedded system performance and flexibility.
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1 Lesons
11 minutes
On-Demand
Free-Video
ACM SIGPLAN

Facilitating the Bootstrapping of a New Instruction Set Architecture

0 rewiews
Explore tools and verification mechanisms for developing new instruction set architectures, focusing on semi-automated approaches to streamline system software and simulator infrastructure creation.
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1 Lesons
20 minutes
On-Demand
Free-Video
Ben Eater

8-Bit CPU Control Logic - Part 1

0 rewiews
Explore the creation of a custom machine language and learn how control logic executes programs in an 8-bit CPU, providing insights into low-level computer architecture.
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1 Lesons
28 minutes
On-Demand
Free-Video
Paul G. Allen School

Designing Fast and Programmable Routers

0 rewiews
Explore cutting-edge router design combining high performance and programmability. Learn about innovative primitives enabling line-rate programmable routers, including packet scheduling, stateful processing, and flow-based statistics measurement.
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24 Lesons
1 hour
On-Demand
Free-Video
Hackaday

Keynote RISC-V and FPGAs - Open Source Hardware Hacking

0 rewiews
Explore RISC-V, an open-source CPU architecture, and its impact on hardware hacking. Learn how it enables innovation in FPGAs and beyond, revolutionizing both academic research and the semiconductor industry.
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14 Lesons
39 minutes
On-Demand
Free-Video
tinyML

TinyML Talks - State of Hardware & Software Ecosystem for Low-Power ML Applications on RISC-V

0 rewiews
Explore RISC-V's open ISA, hardware implementations, and software ecosystem for low-power ML applications. Learn about specifications, cores, boards, and opportunities in this evolving standard.
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20 Lesons
1 hour 1 minute
On-Demand
Free-Video
Linux Foundation

RISC-V and Open Source Hardware - Birds of a Feather Discussion

0 rewiews
Explore the RISC-V architecture and open source hardware ecosystem, from CPU cores to FPGA toolchains. Learn about designing fully open-source chips and engage in discussions with experts.
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1 Lesons
41 minutes
On-Demand
Free-Video
Linux Foundation

RISC-V and Open Source Hardware Projects - Birds of a Feather Discussion

0 rewiews
Explore RISC-V architecture and open hardware initiatives in this informal discussion. Learn about open source cores, FPGA toolchains, and engage with RISC-V experts to understand the current state of open hardware.
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1 Lesons
41 minutes
On-Demand
Free-Video
Linux Foundation

RISC-V: Current Status and Future Directions

0 rewiews
Explore RISC-V's future, open-source development, and community-driven initiatives with Stephano Cetola from RISC-V International in this informative session.
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8 Lesons
27 minutes
On-Demand
Free-Video
Linux Plumbers Conference

Control Flow Integrity on RISC-V

0 rewiews
Explore hardware-assisted control flow integrity mechanisms for RISC-V, focusing on shadow stacks and landing pad instructions to enhance program safety and prevent memory-based attacks.
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1 Lesons
20 minutes
On-Demand
Free-Video
Linux Plumbers Conference

Towards a Standardized eBPF ISA - Conformance Testing

0 rewiews
Explore the BPF Conformance Suite's role in ensuring cross-runtime compatibility for BPF programs. Learn about its components, applications, and impact on the BPF ecosystem's security and collaboration.
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1 Lesons
15 minutes
On-Demand
Free-Video
Linux Foundation

How the Fastest Growing Open Hardware Project Leverages Visibility for Industry Adoption

0 rewiews
Explore RISC-V's rapid growth through strategic visibility, community engagement, and industry adoption, highlighting key metrics, messaging, and inclusive initiatives.
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17 Lesons
25 minutes
On-Demand
Free-Video
Linux Foundation

Open Hardware and RISC-V - Birds of a Feather Session

0 rewiews
Explore open hardware and RISC-V architecture in this discussion led by experts from BeagleBoard.org Foundation and The Linux Foundation.
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1 Lesons
29 minutes
On-Demand
Free-Video
media.ccc.de

RISC-V - The Only Architecture You'll Ever Need

0 rewiews
Explore RISC-V, the open-source processor architecture revolutionizing computing. Learn its technical aspects, applications, and significance in this comprehensive overview.
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1 Lesons
41 minutes
On-Demand
Free-Video
Linux Foundation

RISC-V and RISE Project: Current State and Open Source Initiatives

0 rewiews
Explore the current state of RISC-V, an open instruction set revolutionizing hardware design, and learn about the RISE Project supporting its software ecosystem.
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1 Lesons
36 minutes
On-Demand
Free-Video
ACM SIGPLAN

The Morello ISA Semantics, Proof, and Test Generation

0 rewiews
Explore Morello ISA semantics, proof techniques, and test generation methods for advanced computer architecture and security applications.
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1 Lesons
16 minutes
On-Demand
Free-Video
ACM SIGPLAN

System-Level Weak Memory Models: The Need for Formalisation, ISA Semantics Integration and Model Diversity

0 rewiews
Explore system-level weak memory models, focusing on formalization, ISA semantics integration, and model diversity in computer architecture.
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1 Lesons
19 minutes
On-Demand
Free-Video
CMU Database Group

Vectorized Query Execution with SIMD - Lecture 8

0 rewiews
Explore advanced vectorized query execution techniques using SIMD for optimized database performance in this comprehensive lecture by Prof. Andy Pavlo.
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46 Lesons
1 hour 16 minutes
On-Demand
Free-Video
Hack In The Box Security Conference

Next Generation Virtualization-Based Obfuscators

0 rewiews
Explores next-gen virtualization-based code obfuscation techniques, focusing on target-specific instruction sets and intertwined VM components to enhance resilience against deobfuscation attacks.
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1 Lesons
59 minutes
On-Demand
Free-Video
linux.conf.au

Microwatt Microarchitecture

0 rewiews
Detailed exploration of Microwatt, an open-source soft-core implementation of Power ISA, discussing its microarchitecture and design choices influenced by the ISA specifications.
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11 Lesons
34 minutes
On-Demand
Free-Video
DevConf

Fedora RISC-V: History, Current Status, and Future Developments

0 rewiews
Explore Fedora's journey with RISC-V architecture, from initial porting to current developments and future plans in virtualization and platform standards.
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1 Lesons
24 minutes
On-Demand
Free-Video
DPDK Project

ARM64 SVE Concepts and Integration into DPDK

0 rewiews
Explore Arm64's Scalable Vector Extension (SVE) concepts and learn how to integrate this powerful SIMD feature into DPDK libraries for enhanced performance and hardware adaptability.
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7 Lesons
22 minutes
On-Demand
Free-Video
Models of Consciousness Conferences

Computation, Consciousness, and Teleology - Models of Consciousness

0 rewiews
Explore the relationship between consciousness, computation, and teleology through the lens of physical systems implementation and mortal computation theory in neural processing.
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1 Lesons
19 minutes
On-Demand
Free-Video
SK AI SUMMIT 2024

Open-ISA RISC-V CPU 기반 DSA 개요 및 활용 예시 소개

0 rewiews
Discover RISC-V CPU의 차별화된 활용 방안과 DSA 구현 전략을 통해 임베디드 시스템 설계의 새로운 가능성과 ARM 대비 장점을 파악하는 전문가의 통찰력 있는 분석.
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1 Lesons
23 minutes
On-Demand
Free-Video
Linux Plumbers Conference

Revisiting XSAVE - Lessons from 20 Years of Processor Context State Management

0 rewiews
Explore two decades of processor context state management, focusing on XSAVE's evolution and key insights for efficient system design and optimization.
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1 Lesons
18 minutes
On-Demand
Free-Video
DevConf

Road to Testing Applications on RISC-V with QEMU and Fedora

0 rewiews
Explore RISC-V application testing using QEMU and Fedora, overcoming challenges in VM and container environments without physical hardware.
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1 Lesons
13 minutes
On-Demand
Free-Video
KVM Forum

Automatic Promotion of Helper Functions to TCG Using LLVM

0 rewiews
Explore automatic translation of C helper functions to optimized Tiny Code Generators for QEMU using LLVM. Learn about performance improvements and see an interactive demo of C to TCG mappings.
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1 Lesons
28 minutes
On-Demand
Free-Video
USENIX

CrossMapping - Harmonizing Memory Consistency in Cross-ISA Binary Translation

0 rewiews
Innovative framework for cross-ISA binary translation, enhancing emulation correctness and performance. Introduces specification tables for unified memory model description and efficient primitive mapping.
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1 Lesons
17 minutes
On-Demand
Free-Video
DEFCONConference

Backdoor in the Core - Altering Intel x86 Instruction Set at Runtime

0 rewiews
Dive into groundbreaking research on Intel CPU microcode manipulation, exploring techniques for persistent modifications and potential security implications through microcode backdoors in x86 instruction sets.
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1 Lesons
37 minutes
On-Demand
Free-Video
Hussein Nasser

The Beauty of Assembly: Comparing x86_64 and ARM Architectures

0 rewiews
Explore assembly differences between x86_64 and ARM architectures, covering fundamentals, examples, and compiler optimization techniques.
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5 Lesons
30 minutes
On-Demand
Free-Video
OpenUK

RISC-V: Reshaping the Future of Compute

0 rewiews
Explore RISC-V's impact on computing's future and its inevitable rise in reshaping the industry landscape.
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1 Lesons
33 minutes
On-Demand
Free-Video
NDC Conferences

The Genius of the RISC-V Microprocessor

0 rewiews
Explore RISC-V's innovative architecture, its impact on the industry, and how it compares to x86 and ARM processors. Learn about compressed instruction sets, macro-fusion, and micro-operations.
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1 Lesons
1 hour 1 minute
On-Demand
Free-Video