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1
Intro
2
Basics of RISC VISA
3
Terminology in SiFive Boards
4
Booting SiFive Kernel
5
Early boot in SiFive Boards
6
setup_arch in SiFive
7
SMP init in SiFive Linux
8
Shut Down using SBI
9
Traps in SiFive Kernel
10
Timer Interrupt in SiFive Kernel
11
Paging & MMU in SiFive
12
SiFive Kernel on Qemu
13
Reference
Description:
Explore the fundamentals of porting the Linux kernel to RISC-V architecture in this 35-minute conference talk by G Satish Kumar from Cavium Networks. Gain insights into the minimal kernel support required, initial address setup, and essential macros used for hardware interaction. Learn about ZTEXT_ADDRESS, ZRAM_ADDRESS, ZBASE_ADDRESS, and the initialization of minimal controllers for RISC-V board bring-up. Discover the basics of RISC-V ISA, terminology specific to SiFive boards, and the booting process for SiFive kernels. Delve into early boot procedures, setup_arch implementation, SMP initialization, and shutdown mechanisms using SBI. Examine traps, timer interrupts, paging, and MMU in the SiFive kernel context. Acquire practical knowledge for debugging early issues in board bring-up and prepare for the anticipated influx of RISC-V boards from various vendors.

Base Porting of Linux Kernel on RISC-V Architecture

Linux Foundation
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