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1
Introduction
2
Agenda
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Architecture
4
Applications
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Page faults
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Architectures
7
Processor Elements
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Microarchitecture
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Why cache
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Pipelines
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Out of Order Course
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Dynamic Execution
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Architectural State
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Architecture Examples
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Virtual Memory Cache
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Translation
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Application binaries
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Cache organization
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Sidechannels
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Prefetching
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Branch prediction
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Conditional branches
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Branch predictors
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Meltdown Inspector
Description:
Explore the intricacies of modern microarchitectures and their vulnerabilities in this Stanford Seminar featuring Jon Masters from Red Hat. Delve into the Meltdown and Spectre attacks, as well as other hardware-focused exploits that target shared resources and industry-wide performance optimizations. Gain insights into cache side channel attacks, mitigation strategies, and the broader implications for balancing performance and security in computer systems. Learn about the evolution of sophisticated hardware attacks and their potential impact on the tech industry. Examine topics such as cache organization, pipelining, out-of-order execution, virtual memory, branch prediction, and architectural states. Understand the complexities of processor elements, microarchitecture design, and the challenges of maintaining security in high-performance computing environments. Benefit from Masters' extensive experience in Linux development, computer architecture, and his role in leading mitigation efforts against critical vulnerabilities. Read more

Exploiting Modern Microarchitectures - Meltdown, Spectre, & Other Hardware Attacks

Stanford University
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