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1
Intro
2
Intel SGX
3
Hyper-Threading enabled side channels
4
Hyper-Threading assisted side channels
5
Challenges
6
HyperRace overview
7
Contrived data race: an illustrating example
8
A refined data-race design
9
Co-Location Test via Hypothesis Testing
10
Co-Location Test code
11
Security requirements
12
Security analysis
13
Implementation
14
Performance
15
Discussion and conclusion
Description:
Explore a comprehensive conference talk on securing Intel SGX against Hyper-Threading side-channel attacks. Delve into the innovative HYPERRACE tool, which creates shadow threads and employs contrived data races to verify physical-core co-location without relying on a trustworthy clock. Learn about the challenges, implementation, and security analysis of this LLVM-based solution that aims to eradicate Hyper-Threading side channels in SGX enclave programs. Gain insights into the tool's performance, its ability to detect exception- and interrupt-based side channels, and its implications for enhancing the security of SGX enclaves.

Racing in Hyperspace - Closing Hyper-Threading Side Channels on SGX

IEEE
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