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Study mode:
on
1
Intro
2
What's it about?
3
DRAM - Bank
4
Exploiting Row Hammer
5
Tracing via PMU
6
Memory separation
7
Limitations
8
Unknown geometry
9
Software Defenses
10
Double refresh rate
11
Defenses vol. 2
12
Pseudo Target Row Refresh
13
Timeline
14
Target Row Refresh (TRR)
15
Abstractions
16
Challenges
17
Reverse Engineering
18
Methodology
19
Case study
20
ONE PROBLEM SOLVED...
21
TRRespass: The RowFuzzer
22
BIT FLIPS...
23
Recap
24
Conclusions
Description:
Explore the secret flaws of in-DRAM RowHammer mitigations in this 48-minute conference talk from the Hack In The Box Security Conference. Delve into the vulnerability affecting DDR3 memory chips and its evolution into DDR4. Learn how researchers reverse-engineered the Target Row Refresh (TRR) mitigation concealed within DRAM chips using FPGA-based memory controllers. Discover the implementation details, various flavors of TRR, and why RowHammer remains a persistent threat. Gain insights into creating new hammering patterns and using the RowHammer fuzzer, TRRespass. Follow the speakers' journey through DRAM architecture, exploitation techniques, software defenses, and the challenges of reverse engineering hardware security measures. Understand the implications for hardware and software security, microarchitectural attacks, and side-channel exploitation in this comprehensive exploration of RowHammer vulnerabilities and mitigations.

Secret Flaws of In-DRAM RowHammer Mitigations

Hack In The Box Security Conference
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