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Intro
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RISC-V (virtual) meetups around the world
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Open Source Hardware
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Instruction Set Architecture (ISA)
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What is different about RISC-V?
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RISC-V Base Integer ISA
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RISC-V Standard Extensions
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RISC-V and Industry
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Is RISC-V an Open Source processor?
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RISC-V Privileged Architecture
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RISC-V Boot Flow
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What is OpenSBI?
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UEFI Support
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RISC-V in the Linux kernel
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Linux distro: Fedora
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Linux distro: Debian
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SiFive Freedom Unleashed
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Microchip PolarFire SoC
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Microchip Icicle board
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SAVVY-V board
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Kendryte K210
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SiFive Unmatched
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Sipeed board with Allwinner SoC
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Open source FPGA toolchains
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Team Linux on Badge
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Why design an SoC in Python?
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Open Source ECP5 FPGA boards
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Trustworthy self-hosted computer
Description:
Explore the world of RISC-V and open hardware in this comprehensive conference talk by Drew Fustini from BeagleBoard.org Foundation. Delve into the fundamentals of RISC-V architecture, including its base integer ISA and standard extensions, and understand how it differs from other instruction set architectures. Learn about RISC-V's impact on industry, its privileged architecture, and boot flow. Discover the role of OpenSBI and UEFI support in RISC-V systems. Gain insights into RISC-V implementation in the Linux kernel and explore various Linux distributions compatible with RISC-V. Examine popular RISC-V hardware platforms, including SiFive Freedom Unleashed, Microchip PolarFire SoC, and SAVVY-V board. Investigate open-source FPGA toolchains and the concept of designing SoCs using Python. Conclude with a discussion on trustworthy self-hosted computers and the significance of open hardware in the RISC-V ecosystem.

Linux on RISC-V with Open Hardware

Linux Foundation
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