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Mod-01 Lec-01 Course Contents, Objective

Mod-01 Lec-02 Revision of Prerequisite

Mod-01 Lec-03 Design of Synchronous Sequential Circuits

Mod-02 Lec-04 Analysis of Synchronous Sequential Circuits

Mod-02 Lec-05 Top-down Design

Mod-02 Lec-06 Controller Design

Mod-02 Lec-07 Control algorithm and State diagram

Mod-02 Lec-08 Case study 1

Mod-03 Lec-09 Entity, Architecture and Operators

Mod-03 Lec-10 Concurrency, Data flow and Behavioural models

Mod-03 Lec-11 Structural Model, Simulation

Mod-03 Lec-12 Simulating Concurrency

Mod-03 Lec-13 Classes and Data types

Mod-03 Lec-14 Concurrent statements and Sequential statements

Mod-03 Lec-15 Sequential statements and Loops

Mod-03 Lec-16 Modelling flip-flops, Registers

Mod-03 Lec-17 Synthesis of Sequential circuits

Mod-03 Lec-18 Libraries and Packages

Mod-03 Lec-19 Operators, Delay modelling

Mod-03 Lec-20 Delay modelling

Mod-03 Lec-21 VHDL Examples

Mod-04 Lec-22 VHDL Examples, FSM Clock

Mod-02 Lec-23 FSM issues 1

Mod-02 Lec-24 FSM Issues 2

Mod-02 Lec-25 FSM Issues 3

Mod-03 Lec-26 VHDL coding of FSM

Mod-02 Lec-27 FSM Issues 4

Mod-02 Lec-28 FSM Issues 5

Mod-02 Lec-29 Synchronization 1

Mod-02 Lec-30 Synchronization 2

Mod-05 Lec-31 Evolution of PLDs

Mod-02 Lec-32 Simple PLDs

Mod-05 Lec-33 Simple PLDs: Fitting

Mod-05 Lec-34 Complex PLDs

Mod-06 Lec-35 FPGA Introduction

Mod-06 Lec-36 FPGA Interconnection, Design Methodology

Mod-06 Lec-37 Xilinx Virtex FPGA’s CLB

Mod-06 Lec-38 Xilinx Virtex Resource Mapping, IO Block

Mod-06 Lec-39 Xilinx Virtex Clock Tree

Mod-06 Lec-40 FPGA Configuration

Mod-06 Lec-41 Altera and Actel FPGAs

Mod-03 Lec-42 VHDL Test bench

Mod-02 Lec-43 Case study 2

Mod-02 Lec-44 Case study on FPGA Board

Description:

Explore digital system design using Programmable Logic Devices (PLDs) and Field-Programmable Gate Arrays (FPGAs) in this comprehensive 43-hour course taught by Prof. Kuruvilla Varghese from the Department of Electronics & Communication Engineering at IISc Bangalore. Dive into topics such as synchronous sequential circuits, top-down design, controller design, VHDL programming, finite state machines, PLD evolution, and FPGA architectures. Learn to create entity-architecture pairs, utilize various VHDL models, simulate concurrency, and synthesize sequential circuits. Gain practical experience through case studies and hands-on exercises with FPGA boards. Master essential concepts like delay modeling, clock tree management, and FPGA configuration while exploring specific architectures from manufacturers like Xilinx, Altera, and Actel.

Digital System Design with PLDs and FPGAs

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#Engineering #Electrical Engineering #Circuits #FPGA #Civil Engineering #Structural Engineering #Structural Modeling

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